Physical Verification Engineer

Physical Verification Engineer Job Description Work with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.Co-work with Place & Route team to resolve full-chip layout integration issues.Work with various implementation team to drive Physical VerificationCoordinates with internal IP owners on IP related issues.Coordinates with Manufacturing Team on DRC related issues.Provide automation solutions to improve efficiency in tape-out flow.Report on tapeout issues.Custom LayoutRequirement

Bachelor/Masters Degree in Electrical/Electronics Engineering / Computer Science3-6 years of physical verification or design experiencePreferably well-versed in Calibre, ICVProficient in script programming, such as, Tcl, Perl or C-shellProficient in UNIX (Linux) platformsTrack record of successful tapeout of chipsStrong communication skills, problem solving and analytical skills