SOC / Debug Lead Engineer

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Debug Engineer Lead

Roles and Responsibilities

We are seeking a skilled and dedicated Server Platform SoC Debug Lead Engineer to join our Server Platform Solution Engineering Group’s Debug team. In this role you will work on cutting‑edge server EPYC and AI platforms to lead validation and debug to meet the program milestones. Your responsibilities include collaborating with platform architecture, design, validation, firmware and software engineering teams to resolve critical issues and ensure the highest quality standards.

• Lead system validation plans for EPYC and AI platforms to ensure alignment with program milestone criteria, leveraging strong expertise in domains such as x86 architecture, power management, high‑speed data center I/O (PCIe, CXL, etc.) and RAS features to drive test execution and resolve issues efficiently.
• Collaborate with partner organizations to provide root‑cause analysis for platform issues in a data‑center environment; provide root‑cause analysis for platform‑level, SoC logical, performance and BIOS/firmware issues.
• Improve debug capabilities and methodology over time by identifying common challenges or impediments to efficient debug and working with partner organizations like design, firmware and software teams to drive innovation in silicon architecture, design, tools and methods.
• Manage and track technical issues, risks and priorities effectively with the business unit and SW Debug tools teams. Manage customer and executive communications, including program status, risks and opportunities.
• Maintain strong communication skills, both verbal and written, to convey summary findings and recommendations to senior management.

Required qualifications

Strong understanding of Server platform components, x86 or other complex CPU architectures. Proficiency with Linux and/or Microsoft Operating Systems is a plus.

• Preferred domain expertise in one of the areas such as IO interfaces – PCIe, CXL, RAS, Power management to drive comprehensive system‑level test‑plan execution.
• Understanding of BMC firmware and features, including IPMI, Redfish, sensor monitoring, power control and remote management is a plus.
• Demonstrable experience in designing experiments to solve problems and strong analytical skills.
• Prior experience with computer system design and/or validation, testing tools and environments.
• Experience with handling and taking captures using oscilloscopes, protocol analyzers and JTAG‑based debug tools.
• Proficiency in C, Python and shell scripting for low‑level development and debug.
• Excellent organizational skills and the ability to prioritize multiple workstreams and meet tight deadlines.
• Strong networking and relationship‑building skills, with the ability to drive effective decision‑making across various functions and levels within the organization.
• Knowledge of pre‑silicon environments (Verification, Emulation, Virtual Bring‑Up) is a plus.

Academic credentials

• BS or MS degree in Electrical Engineering or related major, with 10+ years of applicable experience.

Location

Austin, TX

Visa Sponsorship

This role is not eligible for visa sponsorship.

Benefits

AMD benefits at a glance.

EEO Statement

AMD is an equal‑opportunity, inclusive employer and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Other

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.