Senior Design Verification Engineer

Job Description (JD): IP Verification Lead (8+ Years Experience)Role: IP Verification LeadExperience: 8+ YearsNotice Period: 0-30 Days PreferredLocation: Bengaluru / Chennai / HyderabadJob SummaryWe are looking for an experienced IP Verification Lead with 8+ years of expertise in semiconductor/IP verification to lead verification activities for complex IP/subsystem development. The ideal candidate should have strong hands-on experience in verification methodologies, team collaboration, and end-to-end verification closure, with the ability to mentor engineers and drive quality deliverables.Key ResponsibilitiesLead and own IP/subsystem verification activities from planning to signoff.Develop and execute verification plans, testbenches, and coverage closure strategies.Work extensively with SystemVerilog, UVM, assertions (SVA), and scripting languages.Define verification architecture and ensure reusable verification environments.Debug and resolve functional issues across RTL and verification environments.Drive coverage closure (functional/code/assertion coverage) and regression management.Collaborate closely with design, architecture, validation, and physical design teams.Review verification strategies, code quality, and mentor junior verification engineers.Participate in technical discussions and provide leadership for project execution.Required Skills & Qualifications8+ years of experience in IP/SoC Verification.Strong expertise in:SystemVerilogUVM methodologyAssertions (SVA)Functional verificationCoverage-driven verificationDebugging RTL/verification issuesHands-on experience in protocol/IP verification (e.g., AMBA AXI/AHB/APB, PCIe, USB, Ethernet, DDR, or similar).Experience with simulation/debug tools (e.g., VCS, Xcelium, QuestaSim/Verdi).Good scripting knowledge in Python/Perl/Shell/TCL.Strong understanding of SoC/IP architecture and verification methodologies.Preferred QualificationsPrior experience in technical leadership or mentoring teams.Exposure to formal verification, low-power verification, or emulation/prototyping is an added advantage.Strong problem-solving and stakeholder communication skills.Candidate PreferenceImmediate to 30 Days Notice Period (0-30 Days NP) preferred.Open to work from Bengaluru / Chennai / Hyderabad.